The selection and use of FPGAs for automotive interfacing, security, and compute-intensive loads
last-off device. When the system is powered up, the MachXO3D first checks to make sure that it’s running authenticated firmware. It then checks the firmware of the other devices in the system. If any of the components in the system are attacked or compromised, including itself, the MachXO3D rejects the suspect firmware and reloads that component with a known-good, authenticated firmware image. For those developers interested in evaluating MachXO3D-based designs, the LCMXO3D-9400HC- D-EVN MachXO3D Development Board provides an extensible prototyping platform (Figure 3). The board features an L-ASC10 (analog sense and control) hardware management device, a general-purpose I/O interface for use with Arduino and Raspberry Pi boards, two Hirose FX12-40 header positions (DNI), an Aardvark header (DNI), and 128 Mbit serial peripheral interface (SPI) Flash with quad read feature. The board comes in a 4 x 6-inch form factor and features a USB mini-B connector for power and programming, and multiple header positions supporting Arduino, Aardvark, FX12, Hirose and Raspberry Pi. Both a USB cable and a quick start guide are included.
Securing automobiles using FPGAs Security threats from hacking are increasing, with new breaches constantly occurring. In the case of automobiles, a cyberattack could cause loss of control resulting in injury or death to the passengers and pedestrians, and damage to the car, other vehicles, and property. A large part of an automobile’s security solution is to establish a root of trust (RoT); that is, a hardware resource within the system that can always be trusted. One solution is an FPGA-based
An example ECP5 device is the LFE5U-85F-6BG554C with 84,000 logic elements, 3.75 megabits (Mbits) of RAM, and 259 I/Os. Also of interest is the LFE5UM- 45F-VERSA-EVNG ECP5 Versa Development Kit (Figure 2). The board uses a half-length PCI Express (PCIe) form factor and allows designers to evaluate key connectivity features of the ECP5 FPGA, including PCIe, Gigabit Ethernet (GbE), DDR3, and generic SERDES performance.
For compute-intensive applications that also demand high I/O bandwidth—such as AI for tasks like gesture recognition and control, voice recognition and control, human presence detection, occupant identification, and driver monitoring—Lattice’s ECP5 FPGAs feature up to 3.2 Gbit/s serializer/deserializer (SERDES), up to four channels per device in dual-channel blocks for higher granularity, up to 85K look-up tables (LUTs), enhanced digital signal processing (DSP) blocks that provide 2x resource improvement for symmetrical filters, and single event upset (SEU) mitigation support. These FPGAs also provide programmable I/O support for LVCMOS 33/25/18/15/12, XGMII, LVTTL, LVDS, Bus-LVDS, 7:1 LVDS, LVPECL and MIPI D-PHY I/O interfaces. Figure 1: The CrossLink-NX VIP Sensor Input Board, which can act as input to the Embedded Vision Development Kit, contains a CrossLink-NX FPGA and supports the aggregation of four MIPI Sony IMX258 image sensors. (Image source: Lattice Semiconductor)
Figure 3: The MachXO3D Development Board features a MachXO3D FPGA, an L-ASC10 (analog sense and control) hardware management device, support for Arduino and Raspberry Pi boards, two Hirose FX12-40 header positions (DNI), an Aardvark header, and a USB-B connection for device programming. (Image source: Lattice Semiconductor)
requirements, and perform calculations and operations in a massively parallel fashion, while freeing up the host processors for other activities. For security, a flash-based FPGA with dual-boot capability and NIST-certified Immutable Security Engine can act as the automobile’s HRoT and ensure that it—and other devices—are running only authenticated firmware, thereby preventing hackers from cryptographically compromising the automobile’s systems. Further reading Fundamentals of FPGAs: What Are FPGAs and Why Are They Needed?
Conclusion Modern automotive electronics require an ever-increasing number of sensors, electrical interfaces, and protocols, with corresponding demands on processing power and bandwidth. The addition of AI and machine vision processing, as well as security requirements, complicate the implementation of solutions using classic MCU or AP approaches. As shown, by appropriate application of FPGAs, designers can add a degree of flexibility and processing power that can bridge disparate processing environments, perform sensor aggregation and fusion functions, address I/O bandwidth
hardware RoT (HRoT), such as that provided
by Lattice’s MachXO3D family of devices. In addition
to substantial LUT resources and large numbers of I/O, these flash- based devices offer instant-on and hot-socketing capabilities. General- purpose applications include glue logic, bus bridging, bus interfacing, motor control, power-up control, and other control logic applications. Of particular interest is the fact that the MachXO3D is the only FPGA with both dual-boot capability and less than 10K LUTs that is equipped with a hard National Institute of Standards and Technology (NIST)- certified Immutable Security Engine. This allows the MachXO3D to act as the automobile’s HRoT in the form of the system’s first-on,
Figure 2: Presented in a half-length PCI Express form-factor, the ECPe Versa Development Kit lets designers evaluate key connectivity features of the ECP5 FPGA, including PCIe, GbE, DDR3, and generic SERDES performance. (Image source: Lattice Semiconductor)
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