Figure 3: The ESPROS Photonics epc660 integrates a 320 x 240 pixel imager with a full complement of timing circuits and controllers required to convert raw imager data into depth maps. (Image source: ESPROS Photonics)
EPC660-CSP68-007 ToF imager combine a 320 x 240 CCD array with the full complement of timing and signal processing capabilities required to perform 3D ToF measurements and provide 12-bit distance data per pixel (Figure 3). ESPROS Photonics’ EPC660-007 card-edge connector chip carrier mounts the epc650 imager on a 37.25 x 36.00 millimeter (mm) printed circuit board (pc board) complete with decoupling capacitors and card edge
connector. Although this chip carrier addresses the basic hardware interface in a 3D ToF system design, developers are left with the tasks of completing the appropriate optical design on the front end and providing processing resources on the backend. ESPROS Photonics’ epc660 evaluation kit eliminates these tasks by providing a full 3D ToF application development environment that includes a pre- built 3D ToF imaging system and associated software (Figure 4).
Pre-built solutions To implement 3D ToF systems, however, developers face multiple design challenges. Besides the timing circuits mentioned earlier, these systems depend on a carefully designed signal processing pipeline optimized to rapidly read results from the CCD array for each window or phase measurement, and then complete the processing required to turn that raw data into depth maps. Advanced 3D ToF imagers such as ESPROS Photonics'
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