Understand and apply supervisory ics to avoid low-voltage power-up glitch headaches
Experienced engineers know that one of the riskiest times for a system is when power is applied. Depending on time constants and how smoothly and quickly the power rail comes up to nominal, the different ICs and parts of the system may start, lock up, or start in an incorrect mode as they attempt to work with each other. Adding to the challenge is that the timing and slew-related performance of the ICs on power-up can be a function of temperature, associated capacitors, mechanical stress, aging, and other factors. The potential problem is aggravated as operating voltage rails drop to low single-digit values, reducing the amount of “slack” or headroom for functioning with the nominal rail value. All of these factors can lead to inconsistent
What is a glitch? As with many engineering terms such as “buffer” or
“programmable,” the word “glitch” has different meanings depending on the context. A glitch can be: ■ A noise-induced spike on a signal or power line ■ A sudden, brief drop in a power supply rail due to a load transient ■ A microsecond period when both upper and lower MOSFETs in a bridge are inadvertently turned on simultaneously, as a result of different turn on/off times in their gate drivers (a very bad occurrence) ■ A momentary indeterminate
By Bill Schweber Contributed By DigiKey's North American Editors
signal and race condition due to timing tolerances and differences between components.
This article looks at the glitch that can occur during the “power-up” period when power is turned on, and the ICs are transitioning to their normal operating condition, especially in low-voltage systems. Such power-on glitches are especially frustrating because they can cause intermittent, hard-to-debug problems that have no apparent correlation or consistency. As the glitch-inducing conditions are often “on the edge,” their occurrence can vary with temperature, power-rail tolerance (while still within specification),
startup performance and frustrating debug sessions.
For these reasons, analog IC vendors have devised specialized ICs that offer supervisory management features that eliminate the uncertainty and inconsistency of power-up. This article will define and characterize the glitch problem, and then show how it can be avoided through the addition of some small, specialized ICs from Analog Devices.
we get technical
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