Quickly create low-jitter, high-frequency clocks using a translation loop module
divider N (Figure 1).
F RF
F
The PFD compares the phase of input reference and the phase of the feedback signal and generates a series of pulses proportional to the phase error between them. The charge pump receives the PFD pulses and converts them into current source or sink pulses that will in turn tune the VCO either up or down in frequency. The LPF removes all the pulses’ high- frequency energy and converts them into a voltage that the VCO can use. The VCO’s output signal is fed back to the PFD block through the N divider to complete the loop.
PFD
PFD
VCO
Mixer
Figure 3: A translation loop uses a mixer to down- convert the VCO frequency to the PFD frequency instead of using a traditional feedback divider. Image source: Bonnie Baker
LO
be integer or fractional)
8,000 MHz = N × 160 MHz N = 50
F PFD is the PFD frequency Figure 1’s in-band noise floor is calculated using Equation 2: In - band noise floor = FOM PLL + 10 log 10 (F PFD ) + 20 log 10 (N) Where FOM PLL is the PLL’s in-band phase noise floor figure of merit (FOM) Consider an example with an in- band phase noise floor FOM of -234 decibels per Hertz (dB/Hz); a PFD frequency (FPFD) of 160 megahertz (MHz), and an output frequency (FRF) of 8 gigahertz (GHz). For this system, Equation 1 is used to calculate the value of N: F RF = N × F PFD
Equation 2 is used to calculate the in-band noise floor: In-band noise floor = FOM PLL + 10 log 10 (F PFD ) + 20 log 10 (N) = -234 dBc/Hz + 10 log 10 (160e6 Hz)
Figure 1’s frequency transfer function is calculated using Equation 1: F RF = X x F PFD
Where F RF is the output frequency N is the feedback divider ratio (can
+ 20 log 10 (50) = -118 dBc/Hz
In the calculation above, the N divider strongly contributes to the overall in-band noise floor, with 20 log 10 (50), equaling 34 dB. A smaller N value would decrease the in-band noise floor; however, it would also decrease the output frequency. So how do we generate a high output frequency and keep a lower loop gain (N)?
Figure 2: For a standard PLL in this example, the noise from the feedback divider (20 log10(N)) has a 34 dB higher in-band noise compared to the lower yellow plot where N = 1. Image source: Bonnie Baker
With the translation loop architecture, the phase noise of the Offset LO is very important to achieve the best performance at the RF output
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