The solution to this issue is to replace the N-divider with a down- converting mixing stage (Figure 3). In Figure 3, the mixer replaces the feedback N divider, resulting in a loop gain equal to 1 (N=1). This operation will greatly diminish the contribution of the feedback loop to the in-band noise floor. For the in- band noise calculation, the value of N is now equal to 1. Using Equation 2, the in-band noise floor for the modified system is as follows: In-band noise floor = FOM PLL + 10 log 10 (F PFD ) + 20 log 10 (N) = -234 dBc/Hz + 10 log 10 (160e6 Hz) + 20 log 10 (1) = -152 dBc/Hz The new in-band noise shows an improvement of 34 dBc/Hz. In Figure 3, the mixer depends on an extremely low noise LO, called Offset LO. F LO ± F RF must equal F PFD to achieve lock. With the translation loop architecture, the phase noise of the Offset LO is very important to achieve the best performance at the RF output. For this reason, engineers would typically design an Offset LO based on voltage- controlled surface acoustic wave (SAW), or oscillators (VCSOs), or comb generators, or dielectric resonator oscillators (DROs). NOTE: For support with designing an Offset LO, contact Analog Devices.
Figure 4: The EV-ADF4401ASD2Z evaluation board for the ADF4401A translation loop module includes an external PFD, a USB interface, and voltage regulators. Image source: Analog Devices
output signal. This is a significant challenge for engineers to address. With traditional designs, engineers usually proceed to multiple design iterations to achieve optimized performance and suitable isolation. Figure 3 shows how the ADF4401A integrates major circuit blocks to provide a fully characterized solution and eliminates the traditionally difficult areas related to the performance and isolation
Translation loop challenges Traditionally, the design of a low- noise translation loop involves the implementation of numerous circuit blocks, resulting in a complex design, usually large, and with limited flexibility. In addition, the entire circuit must be validated and characterized for the target operation. For example, one major
design concern is LO leakage (LO to RF isolation) to the RF
Figure 5: The EVAL-SDP-CS1Z (or SDP-S) controller board is required to provide a USB connection from the EV-ADF4401ASD2Z to a PC for programming. Image source: Analog Devices
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